High Speed CMOS Logic Dual Positive-Edge Trigger J-K Flip-Flops with Set and eset 16-CDIP -55 to 125

Military 3-ch, 3-input, 2-V to 6-V 5.2 mA drive strength NAND gate 14-CDIP -55 to 125

Military 3-ch, 3-input, 2-V to 6-V 5.2 mA drive strength NAND gate 14-CDIP -55 to 125

High Speed CMOS Logic Dual Negative-Edge Trigger J-K Flip-Flops with eset 14-CDIP -55 to 125

Flip Flop JK-Type Dual Positive Edge Triggered 2V to 6V 14-Pin CDIP

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Dual J-k Flip-flop

the hc10 and hct10 logic gates utilize silicon gate cmos technology to achieve operating s peeds similar to lsttl...